Some memory technologies require memory cells to be biased beyond the baseline technology voltage limits. For example, in embedded DRAM (Dynamic Random Access Memory) and STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) a higher voltage (i.e., higher than nominal operating voltage) may be needed for performing read and/or write operation. One problem with using high voltages (i.e., voltages higher than process technology node nominal voltage) is to design memory peripheral circuits able to withstand the high voltage. An example of a memory peripheral circuit is a word-line driver that drives word-line for the memory cells. Known word-line drivers use thick gate oxide transistors to withstand the high voltage when providing high voltage to a word-line.
However, thick gate oxide transistors increase process complexity. For example, the process node has to provide transistors with thin gate oxide (i.e., normal transistors) and transistors with thick gate oxide (i.e., special transistors). Thick gate oxide transistors may also increase memory size because thick gate oxide transistors are larger in size than thin gate oxide transistors and may also use larger area due to design rule requirements.